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  TSM9938F page 1 ? 2014 silicon laboratories, inc. all rights reserved. features ? second-source for max9938f ? ultra-low supply current: 1 a ? wide input common mode range: +1.6v to +28v ? low input offset voltage: 500 v (max) ? low gain error: <0.5% (max) ? voltage output ? gain option available: TSM9938F: gain = 50v/v ? 5-pin sot23 packaging applications notebook computers power management systems portable/battery-powered systems pdas smart phones description the voltage-output TSM9938F current-sense amplifier is electrically and form-factor identical to the max9938f current-sense amplifier. consuming a very low 1 a supply current, the TSM9938F high-side current-sense amplifier exhibits a 500-v (max) v os and a 0.5% (max) gain erro r, both specifications optimized for any precision current measurement. for all high-side current-sensing applications, the TSM9938F features a wide input common-mode voltage range from 1.6v to 28v. the sot23 package makes the TSM9938F an ideal choice for pcb-area-crit ical, low-current, high- accuracy current-sense app lications in all battery- powered portable instruments. the TSM9938F is specified for operation over the -40c to +85c ext ended temperature range. a 1a, sot23 precision current-sense amplifier typical application circuit percent of units - % input offset voltage - v 0 10 25 35 10 30 0 40 15 20 input offset voltage histogram 5 15 30 50
TSM9938F page 2 TSM9938F rev. 1.0 absolute maximum ratings rs+, rs- to gnd- ............................................. -0.3v to +30v out to gnd- ...................................................... -0.3v to +6v rs+ to rs - ..................................................................... 30v short-circuit duration: ou t to gnd .................... continuous continuous input current (any pin) ............................ 20ma continuous power dissipation (t a = +70c) 5-pin sot23 (derate at 3.9mw/c above +70c) .. 312mw operating temper ature range ...................... - 40c to +85c junction temper ature ................................................ +150c storage temperature rang e ....................... -65c to +150c lead temperature (sol dering, 10s ) ........................... +300c soldering temperatur e (reflow) ............................ +260c electrical and thermal stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the op erational sections of the specifications is not implied. ex posure to any absolute maximum rating conditions for extended periods may affect device reliability and lifetime. package/ordering information order number part markingcarrierquantity TSM9938Feuk+t tada tape & reel 3000 lead-free program: silicon labs supplies only lead-free packaging. consult silicon labs for produ cts specified with wider oper ating temperature ranges.
TSM9938F TSM9938F rev. 1.0 page 3 electrical characteristics v rs+ = v rs- = 3.6v; v sense = (v rs+ - v rs- ) = 0v; t a = -40c to +85c, unless otherwise noted. typical values are at t a = +25c. see note 1 parameter symbol conditions min typ max units supply current (note 2) i cc v rs+ = 5v, t a = +25c 0.5 0.85 a v rs+ = 5v, -40c < t a < +85c 1.1 v rs+ = 28v, t a = +25c 1.1 1.8 v rs+ = 28v, -40c < t a < +85c 2.5 common-mode input range v cm guaranteed by cmrr , -40c < t a < +85c 1.6 28 v common-mode rejection ratio cmrr 1.6v < v rs+ < 28v, -40c < t a < +85c 94 130 db input offset voltage (note 3) v os t a = +25c 100 500 v -40c < t a < +85c 600 gain g 50 v/v gain error (note 4) ge t a = +25c 0.1 0.5 % -40c < t a < +85c 0.6 output resistance r out (note 5) 7.0 10 13.2 k ? out low voltage v ol gain = 50 3 30 mv out high voltage v oh v oh = v rs- - v out (note 6) 0.1 0.2 v note 1: all devices are 100% production tested at t a = +25c. all temperature limits are guaranteed by product characterization. note 2: extrapolated to v out = 0. i cc is the total current into the rs+ and the rs- pins. note 3: input offset voltage v os is extrapolated from v out with v sense set to 1mv. note 4: gain error is calculated by applying two values for v sense and then calculating the error of the actual slope vs. the ideal transfer characteristic: for gain = 50, the applied v sense is 10mv and 60mv. note 5: the device is stable for any capacitive load at v out . note 6: v oh is the voltage from v rs- to v out with v sense = 3.6v/gain.
TSM9938F page 4 TSM9938F rev. 1.0 input offset voltage vs common-mode voltage supply current vs common-mode voltage input offset voltage vs temperature supply current vs temperature percent of units - % input offset voltage - v gain error - % input offset voltage - v temperature - c temperature - c supply curent - a supply voltage - volt 0 10 25 35 25 20 15 0 10 30 0 40 input offset voltage - v supply voltage - volt supply current - a typical performance characteristics v rs+ = v rs- = 3.6v; t a = +25 c, unless otherwise noted. -40 -15 10 35 85 60 0 10 15 20 30 25 15 20 10 0.2 0.6 0 0.4 1 0.8 40 35 30 25 0 40 -20 20 80 60 0.2 0.6 0.8 0 0.4 1 -0.2 0.2 -0.4 0.4 0 20 input offset voltage histogram gain error histogram 5 15 30 50 percent of units - % 5 -40 -15 10 35 85 60 0 10 15 20 30 25 5 5 30 1.8v 28v 3.6v
TSM9938F TSM9938F rev. 1.0 page 5 gain error vs common-mode voltage supply voltage - volt gain error vs. temperature small-signal gain vs frequency small-signal gain -db v sense - mv common-mode rejection - db 0.2 0.3 0.001 0.1 1 10 1000 5 -5 -15 -35 -25 gain error - % v out vs v sense @ supply = 3.6v v out - v frequency - khz common-mode rejection vs frequency 0.1 0 0.1 0.4 0.5 -0.1 0.2 0.3 0 150 100 50 0 100 60 20 0 0.5 2.5 3 3.5 4 1.5 2 0.4 1.6 0.8 1.2 0 -10 -20 -30 100 0 -40 -80 -20 -60 -100 -140 -120 typical performance characteristics v rs+ = v rs- = 3.6v; t a = +25 c, unless otherwise noted. -40 -15 35 60 85 10 temperature - c gain error - % v sense - mv v out - v v out vs v sense @ supply = 1.6v frequency - khz 0 10 15 20 30 25 5 0 1 40 80 0.01 0.001 0.1 1 10 1000 100 0.01 0 1.4 1.0 0.6 0.2
TSM9938F page 6 TSM9938F rev. 1.0 typical performance characteristics v rs+ = v rs- = 3.6v; t a = +25 c, unless otherwise noted. 200s/div v sense v out small-signal pulse response, gain = 50 200s/div large-signal pulse response, gain = 50 v sense v out
TSM9938F TSM9938F rev. 1.0 page 7 pin functions pin label function sot23 5 rs+ external sense resistor power-side connection 4 rs- external sense resistor load-side connection 1, 2 gnd ground. connect this pin to analog ground. 3 out output voltage. v out is proportional to v sense = v rs+ - v rs- block diagrams description of operation the internal configurati on of the TSM9938F ? a unidirectional high-side, curre nt-sense amplifier - is based on a commonly-used oper ational amplifier (op amp) circuit for measuring load currents (in one direction) in the presence of high-common-mode voltages. in the general case, a current-sense amplifier monitors the voltage caused by a load current through an external sense resistor and generates an output voltage as a function of that load current. referring to the typical application circuit on page 1, the inputs of the op-amp-based circuit are connected across an external rsense resistor that is used to measure load current. at the non-inverting input of the TSM9938F (the rs- terminal), the applied voltage is i load x rsense. since the rs- terminal is the non-inverting input of the internal op amp, op-amp feedback action forces the inverting input of the internal op amp to the same potential (i load x rsense). therefore, t he voltage drop across rsense (v sense ) and the voltage drop across r1 (at the rs+ terminal) are equal. to minimize any additional error because of op-amp input bias current mismatch, both r1s are the same value. since the internal p-channel fet?s source is connected to the inverting input of the internal op amp and since the voltage drop across r1 is the same as the external v sense , op amp feedback action drives the gate of the fet such that the fet?s drain current is equal to: i ds = v sense r1
TSM9938F page 8 TSM9938F rev. 1.0 or i ds = i load x r sense r1 since the fet?s drain terminal is connected to rout, the output voltage of the TSM9938F at the out terminal is, therefore; v out = i load x r sense x r out r1 the current-sense amplifier?s gain accuracy is therefore the ratio match of rout to r1. table 1 lists the values for rout and r1. the TSM9938F?s output stage is protected against input overdrive by use of an output current-limiting circuit of 3ma (typical) and a 7v internal clamp protection circuit . table 1: internal gain setting resistors (typical values) gain (v/v) r1 (  ) rout (  ) part numbe r 50 200 10k TSM9938F applications information choosing the sense resistor selecting the optimal value for the external rsense is based on the following criteria and for each commentary follows: 1) rsense voltage loss 2) v out swing vs. applied input voltage at v rs+ and desired v sense 3) total i load accuracy 4) circuit efficiency and power dissipation 5) rsense kelvin connections 1) rsense voltage loss for lowest ir voltage loss in rsense, the smallest usable value for rsense should be selected. 2) v out swing vs. applied input voltage at v rs+ and desired v sense as there is no separate power supply pin for the TSM9938F, the circuit draws its power from the applied voltage at both its rs+ and rs- terminals. therefore, the signal voltage at the out terminal is bounded by the minimum supply voltage applied to the TSM9938F. therefore, v out(max) = v rs+(min) - v sense(max) ? v oh(max) and r sense = v out max gain i load max where the full-scale v sense should be less than v out /gain at the application?s minimum rs+ terminal voltage. for best performance with a 3.6v power supply, rsense should be chosen to generate a v sense of 60mv at the full-scale i load current in each application. for the case where the minimum power supply voltage is higher than 3.6v, the full-scale v sense above can be increased. 3) total load current accuracy in the TSM9938F?s linear region where v out < v out(max) , there are two specifications related to the circuit?s accuracy: a) the TSM9938F?s input offset voltage (v os = 500  v, max) and b) its gain error (ge(max) = 0.5%). an expression for the TSM9938F?s total error is given by: v out = [gain x (1 ge) x v sense ] (gain x v os ) a large value for rsense permits the use of smaller load currents to be measured more accurately because the effects of offset voltages are less significant when compared to larger v sense voltages. due care though should be exercised as
TSM9938F TSM9938F rev. 1.0 page 9 previously mentioned with large values of rsense. 4) circuit efficiency and power dissipation ir losses in rsen se can be large especially at high load currents. it is important to select the smallest, usable rsense value to minimize power dissipation and to keep the physical size of rsense small. if the external rsense is allowed to dissipate significant power, then its inherent temperature coefficient may alter its design center value, thereby reducing load current measurement accuracy. precisely because the TSM9938F?s input stage was designed to exhibit a very low input offset voltage, small rsense values can be used to reduce power dissipation and minimize lo cal hot spots on the pcb. 5) rsense kelvin connections for optimal v sense accuracy in the presence of large load currents, parasitic pcb track resistance should be minimized. kelvin-sense pcb connections between rsense and the TSM9938F?s rs+ and rs- terminals are strongly recommended. the drawing in figure 1 illust rates the connections between the current-sense amplifier and the current- sense resistor. the pcb layout should be balanced and symmetrical to minimize wiring-induced errors. in addition, the pcb layout for rsense should include good thermal management techniques for optimal rsense power dissipation. optional output filter capacitor if the TSM9938F is part of a signal acquisition system where its out terminal is connected to the input of an adc with an internal, switched-capacitor track-and-hold circuit, the internal track-and-hold?s sampling capacitor can cause voltage droop at v out . a 22nf to 100nf, good-quality ceramic capacitor from the out terminal to gnd should be used to minimize voltage droop (holding v out constant during the sample interval). using a capacitor on the out terminal will also reduce the TSM9938F?s small-signal bandwidth as well as band-limiting amplifier noise. using the TSM9938F in bidirectional load current applications in many battery-powered systems, it is oftentimes necessary to monitor a battery?s discharge and charge currents. to perform this function, a bidirectional current-sense amplifier is required. the circuit illustrated in figure 2 shows how two TSM9938Fs can be configured as a bidirectional current-sense amplifier. as shown in the figure, the figure 1 : making pcb connections to the sense resistor (drawing is not to scale). figure 2 : using two TSM9938Fs for bidirectional load current detection
TSM9938F page 10 TSM9938F rev. 1.0 rs+/rs- input pair of TSM9938F #2 is wired opposite in polarity with respect to the rs+/rs- connections of TSM9938F #1. current-sense amplifier #1 therefore measures the discharge current and current-sense amplifier #2 measures the charge current. note that both output voltages are measured with respect to gnd. when the discharge current is being measured, v out1 is active and v out2 is zero; for the case where charge current is being measured, v out1 is zero, and v out2 is active. pc board layout and power-supply bypassing for optimal circuit perf ormance, the TSM9938F should be in very close proximity to the external current-sense resistor and the pcb tracks from rsense to the rs+ and the rs- input terminals of the TSM9938F should be short and symmetric. also recommended are a ground plane and surface mount resistors and capacitors.
TSM9938F silicon laboratories, inc. page 11 400 west cesar chavez, austin, tx 78701 TSM9938F rev. 1.0 +1 (512) 416-8500 ? www.silabs.com package outline drawing 5-pin sot23 package outline drawing (n.b., drawings are not to scale) patent notice silicon labs invests in research and development to help our custom ers differentiate in the market with innovative low-power, s mall size, analog-intensive mixed-signal solutions. s ilicon labs' extensive patent portfolio is a testament to our unique approach and wor ld-class engineering team. the information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. silicon laboratories assumes no responsibility for errors and om issions, and disclaims responsib ility for any consequences resu lting from the use of information included herein. additionally, silicon laborat ories assumes no responsibility for the functioning of undescr ibed features or parameters. silicon laboratories reserves the right to make c hanges without further notice. silicon laboratories makes no warra nty, representation or guarantee regarding the suitability of its pr oducts for any particular purpose, nor does silicon laboratories assume any liability arising out of the application or use of any product or circ uit, and specifically disclaims any and all liability, in cluding without limitation consequential or incidental damages. silicon laboratories products are not designed, intended, or authorized for use in applica tions intended to support or sustain life, or for any other application in wh ich the failure of the silicon laboratories product could create a situation where personal injury or death may occur. should buyer purchase or use silicon laboratories products for any such unintended or unaut horized application, buyer shall indemnify and hold silicon laboratories harmless against all claims and damages. silicon laboratories and silicon labs are tr ademarks of silicon laboratories inc. other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders.
disclaimer silicon laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the silicon laboratories products. characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "typical" parameters provided can and do vary in different applications. application examples described herein are for illustrative purposes only. silicon laboratories reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy or completeness of the included information. silicon laboratories shall have no liability for the consequences of use of the information supplied herein. this document does not imply or express copyright licenses granted hereunder to design or fabricate any integrated circuits. the products must not be used within any life support system without the specific written consent of silicon laboratories. a "life support system" is any product or system intended to support or sustain life and/or health, which, if it fails, can be reasonably expected to result in significant personal injury or death. silicon laboratories products are generally not intended for military applications. silicon laboratories products shall under no circumstances be used in weapons of mass destruction including (but not limited to) nuclear, biological or chemical weapons, or missiles capable of delivering such weapons. trademark information silicon laboratories inc., silicon laboratories, silicon labs, silabs and the silicon labs logo, cmems?, efm, efm32, efr, energy micro, energy micro logo and combinations thereof, "the world?s most energy friendly microcontrollers", ember?, ezlink?, ezmac?, ezradio?, ezradiopro?, dspll?, isomodem ?, precision32?, proslic?, siphy?, usbxpress? and others are trademarks or registered trademarks of silicon laboratories inc. arm, cortex, cortex-m3 and thumb are trademarks or registered trademarks of arm holdings. keil is a registered trademark of arm limited. all other products or brand names mentioned herein are trademarks of their respective holders. http://www.silabs.com silicon laboratories inc. 400 west cesar chavez austin, tx 78701 usa smart. connected. energy-friendly products www.silabs.com/products quality www.silabs.com/quality support and community community.silabs.com


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